创建ON CHIP测试，我的标准步骤

设置的一般步骤：

1. create Xilinx ChipScope Core chipscope_icon and chipscope_ila, then put them into ISE directory
2. add component chipscope_icon and chipscope_ila_1 in Top entity, for example: fpga_right
3. set the CONTROL, DATA and TRIG signals for the component chipscope_ila, the CONTROL comes from the component chipscope_icon, DATA is the signals, which is important and you want to see, for example, I take the signals from the NCORE_adr(the address from the Processors), for TRIG, I use a trigger_proc or use TRIG <= (not ncore_ta) & ncore_r_w;
4. maybe set some LED signals for show the RESET signals, to see, if the program "Init_Raptor" works
   
5. use lb_interface(for the communication with the Computer) in the Top entity
6. use a "Init_Raptor", which made of MFC to set the Reset signal --> Init and Reset
7. now you can use the ChipScope Analyze to do the on chip test

接下来，进行综合，并进行设置：
for Xilinx ISE setting here only for the Studienarbeit(GALS system testing):

Synthesis Properties:
by Synthesis Options: Cross Clock Analysis --> yes
by Xilinx Specific Options: Optimize Instantiated Primitives --> yes

Map Properties:
Trim Unconnected Signals --> yes, Replicate Logic to Allow Logic Level Reduction --> yes, Allow Logic Optimaization Across Hierarchy --> yes,
Use RLOC Constrains --> yes, Pack I/O Register/Latches into IOBs --> For Inputs and Outputs, Map Slice Logic into Unused Block RAMs --> yes
注意：将ISE Project中的所有的无关的.vhd删除，并且加入少的.vhd和.v的文档，让Project简单和其他文档无关，互不影响，只保留有用的文档。注意.ucf很重要，必须直接加入到Project中去，不能和Top entity外部相连。

使用ChipScope:
ChipScope_data <=ncore_addr_top (所需要引出的数据);
ChipScope_trigger <=(not ncore_ta) and (ncore_rw) (给定的trigger条件);

注意使用，如下的语句：
-- synopsys translate_off
在这里面的语句将不参与综合
-- synopsys translate_on