If the prblem with your design lies at the tp-level or is fundamentally hardware-related, using ChipScope modules is probably the best way to debug them.
Example:如何使用 Xilinx ChipScope对FPGA进行调试,具体请看教程。
-- Xilinx Chipscope -- Instantiations chipscope_controller : chipscope_icon
port map (control0 => chipscope_control);
chipscope_logicanalyzer : chipscope_ila_1
port map (clk => clk_lb, -- #
control => chipscope_control,
trig0 => chipscope_trig0);
-- Trigger
-- chipscope_trig0 <= (not ncore_ta) and (ncore_rw);
-- here:
-- chipscope_trig0 <= cluster_system_chipscope_trig_top;
-------------------------------------------------------
-- Xilinx Chipscope
signal chipscope_trig_top_int : std_logic_vector(0 downto 0);
-------------------------------------------------------
chipscope_trig_top_int(0) <= ((not ncore_ta) and (ncore_r_w)); -- #
chipscope_trig_top <= chipscope_trig_top_int;
逻辑分析仪Xilinx ChipScope的产生有两种方法:
Core Generator(核产生器): 产生内核,将这些内核例化后添加到原设计文件,最后综合,实现,下载。
和Core Inserter(核插入器):不需要修改原文件,它是将生成的内核添加到综合后的网表文件中.
Core Inserter 的流程为:
1)的 RTL 综合成 Netlist;
2)调用 Core Inserter 插入逻辑分析仪;
3)布置和布局;
4)产生 bit 文件下载验证。
http://www.stanford.edu/class/ee108a/resources/documentation/chipscope_tutorial.pdf
基本步骤是:- Generationg ChipScope Modules
- Incorporating and Instantiating the ChipScope Modules
- Connecting the ChipScope Modules
- Synthesizing, Implementing, and Running Your Design
- Using ChipScope Analyzer
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